– Law on the Protection of Layout Designs of Integrated Circuits, in force and applied since January 1, 2004.
– Law on the Amending and Supplementing the Law on the Protection of Layout Designs of Integrated Circuits, in force since March 17, 2009.
– Law on the Amending and Supplementing the Law on the Protection of Layout Designs of Integrated Circuits, in force since May 7, 2011.
– Law on the Amending and Supplementing the Law on the Protection of Layout Designs of Integrated Circuits, in force since May 26, 2018.
– Protection of Layout Designs of Integrated Circuits Rules, effective since June 1, 2004.
– Supplements to the Protection of Layout Designs of Integrated Circuits Rules, in force since June 1, 2008.
– Supplements to the Protection of Layout Designs of Integrated Circuits Rules, in force since May 3, 2017.

Definition/subject of protection: protection is granted for layout designs of integrated circuits, topography, if it is original. A topography shall be deemed original if it is the result of the creator’s own intellectual activity and the creative activity of several persons and has not been applied in the industry of semiconductors at the time of its creation. If a topography contains elements that have been applied in the industry of semiconductors, the combination of these elements shall be protected, taken as a whole, only if it meets the above stipulated requirements to the originality.

Entitlement to protection: the creator or his successors in title. Foreign nationals are entitled if this results from international treaties and conventions or from the application of principles of reciprocity.

Legal representation: an agent residing in the country shall represent foreign nationals.

Scope of protection: the holder of the right to a protected topography has the exclusive right to its commercial exploitation, including the right to allow or prohibit the following acts: reproduction of the topography, importation, sale or other forms of putting into circulation the topography or the integrated circuit containing the protected topography. The protection does not apply to its concept, process, system or the technology of production of the topography, or any information stored in the integrated circuit, but to the topography as such.

Duration: ten years from the end of the calendar year in which regular application has been filed or, if it is earlier, from the end of calendar year in which the first commercial exploitation of the topography has started anywhere in the world.

Filing requirements: a topography application including a request for the grant of a topography and a representation suitable for identifying the topography should be filed with the State Intellectual Property Office. No protection can be claimed after expiration of two years from the date of the first common use of the topography in any country.

Unity: only one topography can be claimed in one application.

Examination: concerns only formal requirements. The State Intellectual Property Office does not examine the originality of the subject of the application.

Cancellation and negative statement proceedings: before a special Division of the Office.

Appeal: a lawsuit against the decision of the Office can be filed at the Administrative Court.

Nullification request: possible.

Infringement procedure: before the Trade Court.