Layout Design of Integrated circuits
– Law No. 32 of 2000 on Layout Design of Integrated Circuit, effective since December 20, 2000.
– Government Regulation No. 9 of 2006 on the Procedure for Filing the Layout Design of Integrated Circuit Application, effective since April 3, 2006.
Membership in International Conventions
– WTO's TRIPS Agreement, by virtue of Law No. 7 of 1994.
Applicant: the designer of a layout design of integrated circuit or the person who receives such right from the designer.
Foreigners: appointing a resident agent is compulsory.
Application: an application shall only be filed for one layout design of integrated circuit.
Definitions: integrated circuit means a finished or half finished product that contains various elements, at least one of which is active, that are partly or entirely interconnected and integratedly formed in a semiconductor to produce electronic functions. Layout design means a creation in the form of three-dimensional layout design formed by various elements, at least one of which is active, of which parts of or all of the interconnections in an integrated circuit and the three-dimensional layout is meant for the preparation of making an integrated circuit.
Condition of protection: the right to layout design of integrated circuit is granted to a layout design of integrated circuit that is original. If a layout design of integrated circuit has been exploited commercially, the application must be filed at the latest two years from the date it was exploited for the first time.
Originality: a layout design of integrated circuit is deemed original if such design is the autonomous creation of the designer himself, and when such layout design of integrated circuit was created, it was not a common thing for the designers.
Filing requirements for an application (to be sent to resident agent):
1. Power of attorney;
2. Copy of drawing or photograph, and a description of the layout design;
3. A statement, which states that the layout design of integrated circuit is the applicant’s property;
4. A statement clarifying the date of the layout design of integrated circuit was exploited commercially for the first time, if it has been exploited before the application is filed;
5. If the application is filed by more than one applicant, the application shall be signed by one of them by attaching a written agreement from other applicants;
6. If the application is not filed by the designer, a statement and sufficient evidence showing that the applicant is entitled to the relevant layout design of integrated circuit.
Examination: the Directorate General of Intellectual Property Rights conducts an administrative examination.
Grant of right and publication: if the requirements are fulfilled, the application for registration is granted, and recorded in the General Register of Layout Design of Integrated Circuit and also announced in the Official Gazette of Layout Design of Integrated Circuits or other media.
Delivery of document: a Certificate of Layout Design of Integrated Circuit is issued within a period of two months as of the date the requirements have been fulfilled.
Duration: ten years. The protection is granted since the first commercial exploitation anywhere, or from the filing date.
Infringement: criminal sanction is provided. The holder of a registered layout design of integrated circuit may also claim for damages. All layout designs of integrated circuit infringement is deemed to be offensive warrants complaint (delik aduan).